![]() ![]() Note that the collector of T 2 will go HIGH (roughly equivalent to Vcc). Hence the collector of transistor T 2 will become HIGH and T 3 will conduct and T 4 will be cut-off. When input A or B is LOW (logic 0), base emitter current will flow through T 1 and transistor T 2 will be cut off as it is grounded. As soon as T 4 reaches the saturation condition, its output will be LOW (0) because in saturation the collector voltage of T 4 is almost equal to the emitter voltage. Note that the collector of T 2 will be LOW and T 3 will be cut off. Hence T 4 will conduct and output will be obtained. When both inputs A and B are HIGH (logic 1), no emitter current flows through transistor T 1 but its base-collector junction is in forward bias, so it supplies current to the base of transistor T 2, resulting in transistor The base of T 4 receives current. TTL ‘NAND’ Gate Operation | Operation of TTL ‘NAND’ Gate When T 3 is ‘ON’ the output is HIGH and when T 4 is ‘ON’ the output is LOW. In the totem-pole output stage, either one of the transistors T 3 or T 4 must be ON. This type of output stage is characteristic of TTL devices. The output stage of a TTL NAND gate is often called a totem-pole stage because the three components of the output part, an NPN transistor and a diode D, are connected in series with each other. In the circuit shown in the figure, each emitter of transistor T 1 acts as a diode, so transistor T 1 and the 4K Ohm resistor act as a 2 input NAND gate. The multiple emitter system is a specialty of the TTL 7400 series. In this circuit, instead of the input diode used in DTL circuits, a multiple emitter configuration is used, due to which high switching speed is achieved. Totempole ‘AND’ gateĪ TTL NAND gate is shown in the figure. Many types of SSI and MSI chips are available in this TTL range, through which almost all types of digital circuits can be made. The 7400 series of the TTL family was introduced in 1964 by Texas Instruments. Click Here to read this article in Hindi. The main reason for the slow speed in DTL is the slow removal of stored base charge at the base of the output transistor. What is Transistor Transistor Logic ? | TTLĭue to limited speed, DTL is now out of use area (obsolete) and in its place another logic family Transistor Transistor Logic (TTL) is widely used. TTL Parameters | Parameters of Transistor Transistor Logic.TTL ‘NAND’ Gate Operation | Operation of TTL ‘NAND’ Gate.What is Transistor Transistor Logic ? | TTL.It is the time taken from applying the input to the output produced. It is the amount of noise voltage allowed at the input and it should not affect the output. It is the product of the voltage which is supplied and current needed to produce the output. Number of inputs and outputs connected to the gate, which does not affect the usual performance and does not degrade the voltage. Characteristics of TTL: Fan in and Fan out: To increase the number of inputs, the number of emitters at transistor Q1 is increased accordingly. Q3 and Q4 transistors together form the output. Transistor Q1 consists of 2 emitters, two inputs are given through this 2 emitters. It also consists of four resistors R1,R2,R3,R4 and a diode D. It consists of four transistors Q1,Q2, Q3 and Q4. ![]() This is the two input TTL NAND gate circuit. ![]() Internal Structure of 2 input NAND Gate TTL Internal structure and characteristics of standard TTL NAND gate:
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